In network devices (e.g., switches), production cost may be impacted significantly by the number of conductors (e.g., pins) used on integrated circuits (ICs) within a network device, and the number of signals routed on circuits (e.g., printed circuit boards (PCBs)). For example, a Media Independent Interface (MII) including 24 ports operating at 10 megabits per second (Mbps) and/or 100 Mbps (10/100) Ethernet interfacing between a media access control (MAC) circuit and physical layer (PHY) circuit may include 384 pins. Other interfaces may operate at one gigabit per second (Gbps) or faster.
Newer interfaces that reduce the number of pins have been developed such as the Reduced Media Independent Interface (RMII), Serial Media Independent Interface (SMII), and Serial Gigabit Media Independent Interface (SGMII). An RMII may use eight pins per port such that a 24 port switch could include 192 pins for interfacing between the MAC and the PHY circuits. An SMII may include four pins per port, so a 24 port switch could include 96 pins, plus four additional clock signals. An SGMII (e.g., 10/100/1000 Mbps) may be designed for single ports and use four pins per PHY resulting in 96 pins for 24 ports.
A MAC may be located within a semiconductor device or “chip.” One function of a MAC may be to communicate data over a physical medium (e.g., an optical fiber or a conductive wire). In other words, the MAC may be the interface between the physical medium and the higher layer functions in a device (e.g., an operating system, routing function, etc.). The MAC may communicate with other devices (e.g., other PHY circuits) located on remote chips through the use of a serializer/deserializer (SerDes) device that converts parallel data from the MAC into serial data for transmission over the physical medium. The SerDes may also convert received serial data into parallel data for use with its associated MAC.